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ASIC Verification Engineer
Our client is a fast-growing Semiconductor start up. They are seeking an experienced ASIC Verification Engineer to join their team in developing cutting-edge digital designs. You will play a critical role in verifying complex SoC architectures, ensuring they meet rigorous functional, performance, and compliance standards. This is a hands-on role suited for someone with strong expertise in UVM-based environments and a passion for improving verification processes.
Job Responsibilities
- Develop and execute verification strategies for intricate FPGA and ASIC RTL designs
- Design, implement, and maintain verification environments, including automated test suites and infrastructure, following industry-standard methodologies
- Identify, debug, and document design issues, collaborating closely with design engineers to validate functionality and performance
- Implement coverage-focused verification approaches to achieve thorough verification of all design features
- Coordinate with design, architecture, and software teams to ensure smooth integration and verification of designs
- Stay up to date with verification tools, methodologies, and best practices
Job Requirements
- 5+ years of experience in RTL functional verification for FPGA and/or ASIC designs
- Advanced knowledge of SystemVerilog and UVM
- Hands-on experience with verification EDA tools (e.g., Siemens, Cadence, Synopsys)
- Strong analytical and problem-solving abilities with keen attention to detail
- Experience with formal verification techniques is a plus
- High-speed networking (Ethernet, PCIe) or cryptographic IP experience is advantageous
- Effective communication, teamwork skills and ability to collaborate across functions
- Ability to take ownership and solve problems beyond the scope of the job description, with a flexible, solution-oriented mindset
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