Staff Performance Modeling Engineer

Recruitment Consultant

Chris Canneaux

Contact Details

ccanneaux@eu-recruit.com +44 (0)330 335 2350

Posted

10 days ago

Staff Performance Modeling Engineer
Location: Paris, France
.
Your Role as a Performance Modeling Engineer
As a Performance Modeling Engineer you will join an expert team designing and delivering interconnect and memory hierarchy solutions for some of the world’s most advanced mobile, telecom, automotive, and consumer SoC products.
In this role, you will model complex, highly configurable designs and deliver performance analyses that directly influence architectural decisions. You will work closely with internal teams and customers to provide performance estimation and analysis solutions. This position offers broad exposure across architecture, development, and verification, allowing you to have a real impact beyond a single silo.

Key Responsibilities

Develop and maintain software-based performance models for complex SoC architectures, including interconnects and memory hierarchies
Analyze system performance and produce detailed reports to guide architecture and microarchitecture decisions
Drive architectural improvements through data-driven performance modeling and analysis
Model highly configurable designs using SystemC, C++, and TLM 2.0
Collaborate with internal engineering teams across architecture, development, and verification
Support customers by providing performance analysis, estimation solutions, and technical expertise
Contribute to improving modeling methodologies, tools, and workflows

Required Qualifications

5+ years of experience developing software performance models for one or more of the following: CPUs, GPUs, AI accelerators, Network-on-Chip (NoC), or equivalent systems
5+ years of experience driving architecture and microarchitecture improvements through performance model analysis
Strong experience with SystemC, C++, and/or TLM 2.0
Strong problem-solving, debugging, and analytical skills
Ability to brainstorm, explore trade-offs, and communicate technical insights clearly
Proven ability to work effectively within experienced, cross-functional engineering teams

Preferred Qualifications

Familiarity with ARM processors and on-chip interfaces such as AXI, AHB, and chip-to-chip interfaces like UCIe and PCIe
Strong knowledge of cache coherency protocols such as CHI
Experience with code generators for configurable hardware descriptions
Experience with scripting languages such as Python, TCL, or Perl
Experience with Platform Architect tools

Industry

Semiconductor

Contract Type

Permanent

Location

France

City

Paris

Work Model

On-Site

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