Verification Engineer

Recruitment Consultant

Darren Nye

Contact Details

dn@eu-recruit.com +44 (0)333 307 1621

Posted

1 day ago

Responsibilities

Write Subsystems and Top-Level verification plans, to meet ASIC Functional Requirements
Implement Verification Methodologies and participate to Flow improvements
Develop Subsystems and Top Level testbenches and self-checking testcases
Implement RTL and GLS (Gate Level Simulations) regressions, including coverage metrics
Support the Analog design team in mixed-signal simulations
Support the Software team activities, including on the Emulation platform
Support the Silicon Validation team for the evaluation of the manufactured SoC
Work in team to successfully verify state-of-the-art SoCs
Participate to the test procedures following company QA policy

Essential Requirements

You have a MSc or PhD in Electrical Engineering or equivalent and 3+ years of hands-on experience in Digital Verification
You have a solid background in digital electronics and signal processing
You have a solid knowledge in System Verilog and/or UVM testbenches development
You have a solid knowledge in scripting languages such as Python, Tcl, Makefile, etc…
A previous experience with below items is a plus :
- UVM methodology
- AMBA busses verification (APB, AXI, AHB)
- CPU verification (ARM, RISC V) and C-oriented testing
- Verification of Interfaces such as PCIe, Ethernet, or DRAM
- Verification of digital functions for as ADC, DAC and/or RF transceivers

Industry

Semiconductor

Contract Type

Permanent

Location

France

City

Paris

Work Model

On-Site

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