ASIC / NoC SoC deployment architect

Recruitment Consultant

Liam Geary

Contact Details

lg@eu-recruit.com +44 (0)330 335 2402

Posted

5 hours ago

ASIC / NoC SoC deployment architect
mission is to develop and deploy custom-built interconnect hardware IPs, software tools, and exploration and verification methodologies so that SoC integration teams can quickly assemble SoCs with the desired Power Performance Area (PPA) characteristics.
To this end, technology embraces the complete SoC infrastructure to provide increased SoC performance at minimal cost for integration. Our work is at the backbone of the SoC, interconnecting all major IP solutions.
You will join the solutions deployment team with the mission of deploying and supporting the NoC technology across all the SoCs of portfolio (Mobile, Automotive, Servers, IoT, Connectivity, etc..).
This is a challenging position, working on most innovative technologies, surrounded by experts but also by users of our technology all over the world and from various teams (SoC Architecture, HW and SW Design, Verification, Debug, Post Silicon).
Responsibilities
In your role, you will:
• Collaborate regularly with highly skilled experts across different teams (Architecture, Hardware, software, verification, emulation, …) to ensure our technology is used efficiently in SoCs
• Contribute to the definition of interconnect requirements and configuration in the various SoCs
• Be responsible for the technical support of new solutions
• Help resolving NoC micro-architecture and NoC integration issues
• Participate in defining new solutions and improvements for our technology
• Develop in-depth technical material and organize trainings for different teams worldwide
Skills/Experience
• Strong understanding of overall SoC development flow: SoC architecture, RTL design and verification, SoC performance and DDR memory channel, physical implementation, silicon debug.
• Good knowledge in system level features such as memory-mapping, MMUs, Quality of service, cache infrastructure, security schemes, etc..
• Strong analytical skills for debug in simulation, emulation or silicon bring-up environments.
• Understand of interconnect protocols like AHB/AXI/ACE/ACE-Lite/CHI/NoC concepts.
• Python & Perl scripting
• Ability to quickly react and adapt to changes.
• Excellent communication skills.

Industry

Semiconductor

Contract Type

Permanent

Location

France

City

Guyancourt

Work Model

On-Site

Apply for a vacancy

Apply Now

By applying to this role, you acknowledge that we may collect, store, and process your personal data on our systems.

For more information, please refer to our
Privacy Notice

Name

Phone

Location

Message

Upload CV:

Choose file

Formats: Word, PDF (max. size: 20MB)

Subscribe for industry highlights.

Send Application

ASIC / NoC SoC deployment architect

Apply Now

Other relevant jobs

ASIC / NoC SoC deployment architect

ASIC / NoC Verification & Solutions Engineer

ASIC / NoC Power and Solutions Senior/Staff Engineer

Meta-surface Design & Simulation Engineer

GPU Physical Implementation Engineer

HR Generalist

Senior Analog Design Engineer

Embedded Senior Software Engineer – Storage

Optical Device Researcher

Senior Timing Engineer

Test Coach & Quality Expert

ADAS Perception Engineer – Lane Detection & Departure Warning

ASIC Verification Engineer

Principal Engineer – GPU Driver & System Software

Software Security Engineer

Graphics Developer – Tools Engineer

Embedded Systems Software Engineer

Senior Data Center, AI Software Product Strategy & Go-To-Market Lead

AI Compiler Engineer

RISC-V Microcontroller Design Verification Engineer

System Validation Engineer

Senior Verification Engineer

Compiler Engineer

VP of Engineering

Experimental AMO Physicist

Field Service Engineer

Sensors Design Verification Engineer

Software FOSS Compliance Engineer

IT Infrastructure Project Manager

Sensors Subsystem Design Engineer (all levels)

System Engineer (ML & DSP)

Account Executive Manager

Director Analog Design

Senior Layout Engineer

STA Design Engineer

Litho Process Engineer

Project Manager IT&OT Projects

ADAS Perception Engineer – Lane Detection, Munich

Senior Field Applications Engineer – MCU Systems

Senior Field Application Engineer – Analog & Power

Field Applications Engineer – Power Electronics

Director of Analog & Mixed-Signal IC Design – Munich

Senior Chip Application Engineer – Turkey

Account Executive Manager – Data Centre, Santa Clara

Product Engineer – Semiconductor Testing, Grenoble

Server CPU Physical Design Engineer – Cambridge

Field Applications Engineer Data Centers Power

Technical Marketing Manager Silicon Photonics

Senior Staff Software Engineer/Architect – Runtime Engineer

Senior Staff Embedded Software Engineer – AI Accelerator

CPU Physical Design Engineer

Front-end Wafer Process Engineer

Front-end Wafer Process Technician

Photonics Design Expert

Swoogo Consultant

Requirements Mgmt Tools DevOps Engineer

Requirements Management Support Engineer

Staff RF IC Design Engineer

RISC V Microcontroller Design Engineer

Senior System Verification Engineer – NETC & PCIe

Systems Engineer – Product Definition

Principal GPU Driver & System Software Engineer – Cambridge

Principal Engineer – GPU Architect

Staff Engineer – GPU Architect

Staff Engineer – GPU Compiler Developer

Senior Staff Engineer – GPU Compiler Developer

Staff Engineer – GPU Driver & System Software

Senior Staff Engineer – GPU Driver & System Software

Senior Staff Engineer – GPU Architect, Cambridge

Vice President of Machine Learning – Zurich

Microcontroller Verification Engineer – RISC-V, Cork

Embedded Software Engineer, Staff

RFFE System Feature Engineer (Senior / Staff)

Automotive Validation/Testing Engineer – In-Cabin Sensing

Senior Design Verification Engineer (Sensors)

Hardware Security Engineer

Senior CAD Flow Implementation Engineer for SoCs